The second prototype of Kandou, Firefly 40, or FF40 for short is a test chip taped out in a 40nm process, delivering up to 16 Gbps/wire over an 8-wire interface. It uses the 8b8w code, and a shared clock architecture. It is designed for links up to 20 dB loss and uses Tx FIR as well as continuous linear times equalization. It uses less than 4 pJ/bit.
The chip was demonstrated at ISSCC 2014 and the corresponding paper won the Jan Van Vessem Award of the conference.
The first prototype of Kandou, Firefly 90, or FF90 for short, is a test chip taped out in a 90nm process, delivering up to 4 Gbps/wire over an 8-wire interface. In tests, speeds of up to 6.8 Gbps/wire were observed. The chordal coding used in this prototype is the 8b8w code delivering 8 bits over 8 correlated wires in every UI. This prototype contains a full transmitter, and part of the receiver. The link is made for up to 5 cm of FR4 trace at full speed. It has a shared clock architecture, and uses less than 2 pJ/bit of energy.